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TSM7401 20V N-Channel MOSFET w/ESD Protected Pin assignment: 1. Source 2. Source 3. Source 4. Gate 5, 6, 7, 8. Drain VDS = 20V RDS (on), Vgs @ 4.5V, Ids @ 4.5A =20m RDS (on), Vgs @ 2.7V, Ids @ 3.5A =25m Features Advanced trench process technology High density cell design for ultra low on-resistance Excellent thermal and electrical capabilities Specially designed for Li-ion battery packs. Battery switch application Block Diagram Ordering Information Part No. TSM7401CS Packing Tape & Reel 2,500/per reel Package SOP-8 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @4.5V. Pulsed Drain Current, VGS @4.5V Maximum Power Dissipation Ta = 25 C Ta = 70 oC Operating Junction Temperature Operating Junction and Storage Temperature Range TJ TJ, TSTG o Symbol VDS VGS ID IDM PD Limit 20V 12 8 30 2.5 1.3 +150 - 55 to +150 Unit V V A A W o o C C Thermal Performance Parameter Junction to Foot (Drain) Thermal Resistance Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t<=10sec. Symbol Rjf Rja Limit 30 50 Unit o o C/W C/W TSM7401 1-1 2003/12 rev. A Electrical Characteristics (Ta = 25 oC unless otherwise noted) Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage On-State Drain Current Forward Transconductance Conditions VGS = 0V, ID = 250uA VGS = 4.5V, ID = 4.5A VGS = 2.7V, ID = 3.5A VDS = VGS, ID = 250uA VDS = 20V, VGS = 0V VGS = 4.5V, VDS = 0V VGS = 4.5V, VDS >= 5V VDS = 10V, ID = 4.5A VDS = 10V, ID = 4.5A, VGS = 4.5V VDD = 10V, RL = 10, ID = 1A, VGEN = 4.5V, RG = 6 VDS = 10V, VGS = 0V, f = 1.0MHz Symbol BVDSS RDS(ON) RDS(ON) VGS(TH) IDSS IGSS ID(ON) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss IS Min 20 --0.65 --30 -------------- Typ -20 25 0.85 ---30 15.5 3 5 75 125 600 300 1336 220 130 -0.6 Max -25 30 -1.0 100 --35 --100 150 720 360 ---2.0 1.2 Unit V m V uA nA A S Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = 2.0A, VGS = 0V A V VSD nC nS pF Note : pulse test: pulse width <=300uS, duty cycle <=2% TSM7401 2-2 2003/12 rev. A Typical Characteristics Curve (Ta = 25 oC unless otherwise noted) TSM7401 3-3 2003/12 rev. A Electrical Characteristics Curve (continued) TSM7401 4-4 2003/12 rev. A SOP-8 Mechanical Drawing A DIM SOP-8 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 4.80 5.00 0.189 0.196 3.80 4.00 0.150 0.157 1.35 1.75 0.054 0.068 0.35 0.49 0.014 0.019 0.40 1.25 0.016 0.049 1.27 (typ) 0.05 (typ) 0.10 0.25 0.004 0.009 0o 7o 0o 7o 5.80 6.20 0.229 0.244 0.25 0.50 0.010 0.019 16 9 B P 1 8 G C D K M R F A B C D F G K M P R TSM7401 5-5 2003/12 rev. A |
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